1 说明

按照创龙例程upp通讯改的，原理是通过clc触发中断，经过测试gpio27可以触发中断。

2 源代码（upp通讯里的）

#include 
#include 
#include 
#include 
#include 
#include 
/* INTC and CPINTC variables */
CSL_IntcContext 			 context;
CSL_IntcGlobalEnableState	 state;
CSL_IntcEventHandlerRecord   event_handle[2];
CSL_IntcObj 				 uppIntcObj;
CSL_IntcHandle				 uppIntcHandle;
CSL_CPINTC_Handle            hnd;

/* Interrupt service function */
void upp_isr(void *arg) {
	/* clear the system interrupt in the interrupt controller */
	CSL_CPINTC_clearSysInterrupt(hnd, (CSL_CPINTCSystemInterrupt) arg);
}
/**
 * @brief This function is used to register upp interrupt.
 *
 * @param void 
 *
 * @return successful execution of the function
 *     @retval 0 successful
 *     @retval -1 failed
 */
int8_t upp_interrupt_init(void) {
	uint8_t eventId;
	CSL_IntcParam vectId;
	/* ----------------INTC module initialization---------------- */
	context.eventhandlerRecord = event_handle;
	context.numEvtEntries = 2;
	if (CSL_intcInit(&context) != CSL_SOK) {
		printf("Initialize intc failed!\n");
		return -1;
	}
	/* Enable NMIs */
	if (CSL_intcGlobalNmiEnable() != CSL_SOK) {
		printf("Enable global nmi failed!\n");
		return -1;
	}
	/* Enable global interrupts */
	if (CSL_intcGlobalEnable(&state) != CSL_SOK) {
		printf("Enable global intc failed!\n");
		return -1;
	}
	/* ----------------CIC configure--------------- */
	/* Open the handle to the CPINT Instance */
	hnd = CSL_CPINTC_open(0);
	if (hnd == 0) {
		printf("Error: Unable to open CPINTC-0\n");
		return -1;
	}
	/* Disable all host interrupts. */
	CSL_CPINTC_disableAllHostInterrupt(hnd);
	/* Configure no nesting support in the CPINTC Module. */
	CSL_CPINTC_setNestingMode(hnd, CPINTC_NO_NESTING);
	/* CSL_INTC0_RPINT: upp system interrupt number = 156 */
	/* Clear system interrupt number on CIC */
	CSL_CPINTC_clearSysInterrupt(hnd, CSL_INTC0_RPINT);
	/* Enable system interrupt number on CIC */
	CSL_CPINTC_enableSysInterrupt(hnd, CSL_INTC0_RPINT);
	/* 
	 * Map system interrupt to channel
	 * channel: CIC0_OUT(8+20*n) (n is core num) = 8
	 */
	CSL_CPINTC_mapSystemIntrToChannel(hnd, CSL_INTC0_RPINT, 8);
	/* Enable the host interrupt */
	CSL_CPINTC_enableHostInterrupt(hnd, 8);
	/* Enable all host interrupts also. */
	CSL_CPINTC_enableAllHostInterrupt(hnd);
	/* ----------------INTC configure--------------- */
	/* 
	 * event ID: input to INTC 
	 * CSL_GEM_INTC0_OUT_8_PLUS_20_MUL_N: CIC0_OUT(8+20*n)
	 * CIC0_OUT(8+20*n) event ID = 30
	 */
	eventId = CSL_GEM_INTC0_OUT_8_PLUS_20_MUL_N;
	/* Open INTC, event ID 30 maps to CPU interrupt vector 13 */
	vectId = CSL_INTC_VECTID_13;
	uppIntcHandle = CSL_intcOpen(&uppIntcObj, eventId, &vectId, NULL );
	if (uppIntcHandle == NULL ) {
		printf("Open intc failed!\n");
		return -1;
	}
	/* Bind ISR to Interrupt */
	event_handle[0].handler = (CSL_IntcEventHandler) &upp_isr;
	event_handle[0].arg = (void *) CSL_INTC0_RPINT;
	CSL_intcPlugEventHandler(uppIntcHandle, event_handle);
	/* clean event */
	CSL_intcHwControl(uppIntcHandle, CSL_INTC_CMD_EVTCLEAR, NULL );
	/* Event Enable */
	CSL_intcHwControl(uppIntcHandle, CSL_INTC_CMD_EVTENABLE, NULL );
	return 0;
}

3 自己改的

#include 
/* Compiler Header files */
#include 
/* CSL Header file */
#include 
#include 
#include 
#include 
#include 
/* Driver utilities include */
#include "driver/c66x_gpio.h"
#define PIN_CONTROL_0               0x02620580  //	GPIO控制寄存器基地址
#define LED1             GPIO_19
#define LED2             GPIO_22
#define LED3             GPIO_23
#define LED4             GPIO_27
#define KEY2             GPIO_0
/* INTC and CPINTC variables */
CSL_IntcContext context;
CSL_IntcGlobalEnableState state;
CSL_IntcEventHandlerRecord event_handle[2];
CSL_IntcObj gpioIntcObj;
CSL_IntcHandle gpioIntcHandle;
CSL_CPINTC_Handle hnd;
/* Interrupt service function */
void gpio_isr(void *arg) {
	printf("succeeded!\n");
	/* clear the system interrupt in the interrupt controller */
	CSL_CPINTC_clearSysInterrupt(hnd, (CSL_CPINTCSystemInterrupt) arg);
}
int8_t gpio_interrupt_init(void) {
	uint8_t eventId;
	CSL_IntcParam vectId;
	/* ----------------INTC module initialization---------------- */
	context.eventhandlerRecord = event_handle;
	context.numEvtEntries = 10;
	if (CSL_intcInit(&context) != CSL_SOK) {
		printf("Initialize intc failed!\n");
		return -1;
	}
	/* Enable NMIs */
	if (CSL_intcGlobalNmiEnable() != CSL_SOK) {
		printf("Enable global nmi failed!\n");
		return -1;
	}
	/* Enable global interrupts */
	if (CSL_intcGlobalEnable(&state) != CSL_SOK) {
		printf("Enable global intc failed!\n");
		return -1;
	}
	/* ----------------CIC configure--------------- */
	/* Open the handle to the CPINT Instance */
	hnd = CSL_CPINTC_open(0);
	if (hnd == 0) {
		printf("Error: Unable to open CPINTC-0\n");
		return -1;
	}
	/* Disable all host interrupts. */
	CSL_CPINTC_disableAllHostInterrupt(hnd);
	/* Configure no nesting support in the CPINTC Module. */
	CSL_CPINTC_setNestingMode(hnd, CPINTC_NO_NESTING);
	/* CSL_INTC0_RPINT: upp system interrupt number = 156 */
	/* Clear system interrupt number on CIC */
	CSL_CPINTC_clearSysInterrupt(hnd, CSL_INTC0_GPINT27);
	/* Enable system interrupt number on CIC */
	CSL_CPINTC_enableSysInterrupt(hnd, CSL_INTC0_GPINT27);
	/*
	 * Map system interrupt to channel
	 * channel: CIC0_OUT(8+20*n) (n is core num) = 8
	 */
	CSL_CPINTC_mapSystemIntrToChannel(hnd, CSL_INTC0_GPINT27, 8);
	/* Enable the host interrupt */
	CSL_CPINTC_enableHostInterrupt(hnd, 8);
	/* Enable all host interrupts also. */
	CSL_CPINTC_enableAllHostInterrupt(hnd);
	/* ----------------INTC configure--------------- */
	/*
	 * event ID: input to INTC
	 * CSL_GEM_INTC0_OUT_8_PLUS_20_MUL_N: CIC0_OUT(8+20*n)
	 * CIC0_OUT(8+20*n) event ID = 30
	 */
	eventId = CSL_GEM_INTC0_OUT_8_PLUS_20_MUL_N;
	/* Open INTC, event ID 30 maps to CPU interrupt vector 13 */
	vectId = CSL_INTC_VECTID_13;
	gpioIntcHandle = CSL_intcOpen(&gpioIntcObj, eventId, &vectId, NULL);
	if (gpioIntcHandle == NULL) {
		printf("Open intc failed!\n");
		return -1;
	}
	/* Bind ISR to Interrupt */
	event_handle[0].handler = (CSL_IntcEventHandler) &gpio_isr;
	event_handle[0].arg = (void *) CSL_INTC0_GPINT27;
	CSL_intcPlugEventHandler(gpioIntcHandle, event_handle);
	/* clean event */
	CSL_intcHwControl(gpioIntcHandle, CSL_INTC_CMD_EVTCLEAR, NULL);
	/* Event Enable */
	CSL_intcHwControl(gpioIntcHandle, CSL_INTC_CMD_EVTENABLE, NULL);
	return 0;
}
//基于CPU周期的延迟函数，100000000=100ms
void cpu_delaycycles(uint32_t cycles) {
	uint32_t start_val;
	/* Start TCSL so its free running */
	CSL_chipWriteTSCL(0);
	start_val = CSL_chipReadTSCL();
	while ((CSL_chipReadTSCL() - start_val) < cycles)
		;
}
int main(void) {
	/* Set pin as GPIO mode */
	*((uint32_t *) PIN_CONTROL_0) |= ((1 << LED1)|
	(1 << LED4) |(1 << LED2) |(1 << KEY2 ) |
	(1 << LED3));
	/* Set GPIO as output mode */
	gpio_set_direction(LED1, GPIO_OUT);
	gpio_set_direction(LED2, GPIO_OUT);
	gpio_set_direction(LED3, GPIO_OUT);
	gpio_set_direction(LED4, GPIO_IN);
	gpio_set_direction(KEY2, GPIO_IN);
	gpio_interrupt_init();
	gpio_enable_global_interrupt();
	gpio_set_risingedge_interrupt(LED4);
	while (1) {
		printf("GPIO27 is %d\n",gpio_read_input(LED4));
		//printf("KEY2 is %d\n",gpio_read_input(KEY2));
		cpu_delaycycles(100000000);
	};
}

6657.cmd

-heap  0x4000/* 16KB */
-stack 0x4000/* 16KB */
MEMORY
{
	/*
	 * L2SRAM Core internal address
	 * if other cores or peripherals access, change to global address
	 * Core 0: 0x10800000 ~ 0x1087FFFF
	 * Core 1: 0x11800000 ~ 0x1187FFFF (only C6657)
	 */
	L2SRAM 			o = 0x00800000 l = 0x00100000 /* 1MB L2SRAM */
	/* Core0 running IBL will take up 0x0C000000 ~ 0x0C01FFFF(128KB), reserve at here! */
	MSMCSRAM 		o = 0x0C020000 l = 0x000E0000 /* 896KB MSMCSRAM */
	DDR3 			o = 0x80000000 l = 0x20000000 /* 512MB DDR3 */
}
SECTIONS
{
	.text:_c_int00 > L2SRAM /* program entry address */
	.text	> L2SRAM /* executable code */
	.cinit	> L2SRAM /* tables which initialize global variables */
	.const	> L2SRAM /* initialized global constant */
	.switch > L2SRAM /* jump tables for certain switch statements */
	.stack 	> L2SRAM /* system stack */
	.data	> L2SRAM /* initialized global data */
	.far 	> L2SRAM /* far initialized global constant */
	.fardata > L2SRAM /* far uninitialized global and global variables */
	.cio 	> L2SRAM /* buffer for stdio functions */
	.sysmem > L2SRAM /* malloc heap */
	GROUP
	{
		.neardata /* far uninitialized global and global variables */
		.rodata	/* global static constant */
		.bss /* uninitialized global variables*/
	} > L2SRAM
}